VESIT, Chembur gets a grant of Rs 82.59 lakh from MeitY for an innovative project proposal for VLSI chip design

Mumbai twenty fourth May 2023: V.E.S Institute of Technology (VESIT) has introduced that the Ministry of Electronics and Information Technology (MeitY), below their esteemed “Chips to Startup (C2S)” program, has awarded a grant of Rs 82.59 lakh for a ground-breaking project proposal.

The project, an extension of the Ph.D. work undertaken by Dr. Nilima Warke, Associate Professor, Automation & Robotics Department, and Dr. Jayamala Adsul, Assistant Professor, Electronics dept, VESIT below the mentorship of Dr. P. P. Vaidya, Hon. Dean R&D, will probably be applied in collaboration with Shri. Amit Rambhia, Chairman and Managing Director of Panache Digilife Ltd, is an esteemed graduate of VESIT.

The project proposal stood out amongst quite a few submissions on account of its innovative nature and potential for important contributions to the sphere of electronics. With this grant, VESIT will be capable of additional the analysis and growth efforts of Dr. Warke and Dr. Adsul, advancing their pioneering work and opening new avenues for technological developments.

In addition to the grant cash, VESIT has been granted distant entry to growth instruments price greater than Rs. 1 crore, offering the mandatory assets to facilitate the project’s profitable implementation. This collaboration and help from MeitY will allow VESIT to proceed its mission of fostering analysis and innovation inside its tutorial neighborhood.

Principal Dr.(Mrs.) J.M. Nair, VES Institute of Technology expressed her elation, stating: “We are very delighted that the Ministry of Electronics and Information Technology (MeitY) has awarded VESIT a beneficiant grant below the ‘Chips to Startup’ program. It is for the primary time the institute is receiving a analysis grant for VLSI chip design. The analysis grants acquired earlier had been within the IT and Nuclear area. Last 12 months, one other project developed within the VESIT R&D lab acquired a Start-up grant of Rs. 25 lakhs from MeitY. The C2S grant may even give motivation to different researchers engaged on {hardware} analysis tasks. We hope that this may even facilitate the chip implementation of different tasks developed within the state of artwork R&D lab within the institute.

This grant additionally envisages producing an industry-ready expert workforce within the area of VLSI. VESIT has already utilized to AICTE and Mumbai University for beginning a PG course in “VLSI and Embedded Systems” from the educational 12 months 2023-24. This additional will assist to inculcate the tradition of System-on-Chip (SoC)/System Level Design and act as a catalyst for the expansion of start-ups in fabless design. We prolong our heartfelt gratitude to the Ministry for recognizing the potential of this project and for their beneficial help.”

Principal Nair remarked: “We are immensely grateful to the VES administration for their unwavering help in creating an setting conducive to analysis and innovation. Additionally, we prolong our gratitude to Shri. B. L. Boolani, Managing Trustee, VESIT for his particular curiosity in selling and fostering a tradition of analysis and innovation throughout the institute. This academia-industry collaboration exemplifies the institute’s dedication to driving technological developments and nurturing expertise.”

The self-financed institute recognized for its ” No capitation payment for admission ” is happy about this chance to contribute to the event of the expertise panorama and appears ahead to the profitable execution of the project, which holds super potential for societal and financial influence.